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MC74AC299, MC74ACT299 8-Input Universal Shift/ Storage Register with Common Parallel I/O Pins
The MC74AC299/74ACT299 is an 8-bit universal shift/storage register with 3-state outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Additional outputs are provided for flip-flops Q0, Q7 to allow easy serial cascading. A separate active LOW Master Reset is used to reset the register.
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* * * * * *
PDIP-20 N SUFFIX CASE 738
20 1
Common Parallel I/O for Reduced Pin Count Additional Serial Inputs and Outputs for Expansion Four Operating Modes: Shift Left, Shift Right, Load and Store 3-State Outputs for Bus-Oriented Applications Outputs Source/Sink 24 mA ACT299 Has TTL Compatible Inputs
VCC 20 S1 19 DS7 18 Q7 17 I/O7 16 I/O5 15 I/O3 14 I/O1 13 CP 12 DS0 11
20 1
SO-20 DW SUFFIX CASE 751
ORDERING INFORMATION
Device MC74AC299N MC74ACT299N MC74AC299DW Package PDIP-20 PDIP-20 SOIC-20 SOIC-20 SOIC-20 SOIC-20 Shipping 18 Units/Rail 18 Units/Rail 38 Units/Rail 1000 Tape & Reel 38 Units/Rail 1000 Tape & Reel
1 S0
2 OE1
3 OE2
4 I/O6
5 I/O4
6 I/O2
7 I/O0
8 Q0
9 MR
10 GND
MC74AC299DWR2 MC74ACT299DW MC74ACT299DWR2
Figure 1. Pinout: 20-Lead Packages Conductors (Top View)
DEVICE MARKING INFORMATION PIN ASSIGNMENT
PIN CP DS0 DS7 S0, S1 MR OE1, OE2 I/O0-I/O7 Q 0 , Q7 FUNCTION Clock Pulse Input Serial Data Input for Right Shift Serial Data Input for Left Shift Mode Select Inputs Asynchronous Master Reset 3-State Output Enable Inputs Parallel Data Inputs or 3-State Parallel Outputs Serial Outputs
See general marking information in the device marking section on page 9 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2003
1
April, 2003 - Rev. 6
Publication Order Number: MC74AC299/D
MC74AC299, MC74ACT299
DS7 Q7
S0 S1 CP
DS0
DS7 Q7
DQ CD I/O7
OE MR Q I/O I/O I/O I/O I/O I/O I/O I/O 0 0 1 2 3 4 5 6 7
CP
Figure 2. Logic Symbol
DQ CD
I/O6
CP DQ CD I/O5
CP DQ CD I/O4
CP DQ CD I/O3
CP DQ CD I/O2
CP DQ CD I/O1
CP DQ CD S0 I/O0
S1 DS0 CP OE1 Q0 MR OE2
NOTE:
That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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MC74AC299, MC74ACT299
FUNCTIONAL DESCRIPTION The MC74AC299/74ACT299 contains eight edge-triggered D-type flip-flops and the interstage logic necessary to perform synchronous shift left, shift right, parallel load and hold operations. The type of operation is determined by S0 and S1, as shown in the Truth Table. All flip-flop outputs are brought out through 3-state buffers to separate I/O pins that also serve as data inputs in the parallel load mode. Q0 and Q7 are also brought out on other pins for expansion in serial shifting of longer words. A LOW signal on MR overrides the Select and CP inputs and resets the flip-flops. All other state changes are initiated by the rising edge of the clock. Inputs can change when the clock is in either state provided only that the recommended setup and hold times, relative to the rising edge of CP, are observed. A HIGH signal on either OE1 or OE2 disables the 3-state buffers and puts the I/O pins in the high impedance state. In this condition the shift, hold, load and reset operations can still occur. The 3-state buffers are also disabled by HIGH signals on both S0 and S1 in preparation for a parallel load operation.
TRUTH TABLE
Inputs Response MR L H H H H S1 X H L H L S0 X H H L L CP X Asynchronous Reset; Q0-Q7 = LOW Parallel Load; I/On Qn Shift Rights; DS0 Q0, Q0 Q1, etc. Shift Left; DS7 Q7, Q7 Q6, etc. Hold
X
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition
MAXIMUM RATINGS*
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL Input Rise and Fall Time (Note 2) In ut ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - ns/V - 140 85 -24 24 C C mA mA ns/V V V Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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MC74AC299, MC74ACT299
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level u g ee Input Voltage Maximum Low Level a u o ee Input Voltage Minimum High Level u g ee Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level a u o ee Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOZT Maximum Input a u u Leakage Current Maximum 3-State Current Minimum Dynamic Output C O t t Current t Maximum Quiescent a u Qu esce Supply Current 5.5 55 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - 74AC TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 0 1 0.6 0 6 - - 80 8.0 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 1 0 6.0 6 0 75 -75 80 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 A V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
VIL
V
VOH
V
V
A A mA mA A
5.5 55 5.5 5.5 55 5.5
- - - -
IOLD IOHD ICC
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* (V) Min fmax tPLH tPHL Maximum Input Frequency Propagation Delay CP to Q0 or Q7 Propagation Delay CP to Q0 or Q7 3.3 5.0 3.3 5.0 3.3 5.0 90 130 8.5 5.5 8.5 5.5 TA = +25C CL = 50 pF Typ - - - - - - Max - - 20.5 14 21.5 14.5 74AC TA = -40C to +85C CL = 50 pF Min 80 105 7.0 4.5 7.0 5.0 Max - - 22 15 23 16 MHz ns ns 3-3 3-6 3-6 Unit Fig. No.
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC299, MC74ACT299
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* (V) Min tPLH tPHL tPHL tPHL tPZH tPZL tPHZ tPLZ Propagation Delay CP to I/On Propagation Delay CP to I/On Propagation Delay MR to Q0 or Q7 Propagation Delay MR to I/On Output Enable Time OE to I/On Output Enable Time OE to I/On Output Disable Time OE to I/On Output Disable Time OE to I/On 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 9.0 6.0 10 6.5 9.0 5.5 9.0 5.5 7.0 4.5 7.0 5.0 6.5 3.5 5.5 3.5 TA = +25C CL = 50 pF Typ - - - - - - - - - - - - - - - - Max 20.5 14.5 23 16 22.5 15.5 21.5 15.0 18 12.5 18 12.5 18.5 14 17 12.5 74AC TA = -40C to +85C CL = 50 pF Min 7.5 5.0 8.5 6.0 7.5 5.0 7.5 5.0 6.0 4.0 6.0 4.0 5.5 3.0 4.5 2.0 Max 22.5 16 24.5 17.5 25.0 17.0 24.0 16.5 19.5 13.5 20.5 14 19.5 15 19 13.5 ns ns ns ns ns ns ns ns 3-6 3-6 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
AC OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* (V) Typ ts th ts th ts th tw tw trec Setup Time, HIGH or LOW S0 or S1 to CP Hold Time, HIGH or LOW S0 or S1 to CP Setup Time, HIGH or LOW I/On to CP Hold Time, HIGH or LOW I/On to CP Setup Time, HIGH or LOW DS0 or DS7 to CP Hold Time, HIGH or LOW DS0 or DS7 to CP CP Pulse Width, LOW Width MR Pulse Width LOW Width, Recovery TIme MR to CP 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 - - - - - - - - - - - - - - - - - - TA = +25C CL = 50 pF 74AC TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 8.0 5.0 0.5 1.0 5.5 3.5 0 1.0 6.5 4.0 0 1.0 4.5 3.5 4.5 3.5 1.5 1.5 8.5 5.5 0.5 1.0 6.0 4.0 0 1.0 7.0 4.5 0.5 1.0 5.0 3.5 5.0 3.5 1.5 1.5 ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-6 3-6 3-6 3-9 3-9
*Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC299, MC74ACT299
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level u g ee Input Voltage Maximum Low Level a u o ee Input Voltage Minimum High Level u g ee Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level a u o ee Output Voltage 4.5 5.5 4.5 5.5 IIN IOZT Maximum Input a u u Leakage Current Maximum 3-State Current Additional Max. ICC/Input Minimum Dynamic Output C O t t Current t Maximum Quiescent a u Qu esce Supply Current 55 5.5 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0 1 0.1 0.6 0 6 - - - 8.0 80 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1 0 1.0 6.0 6 0 1.5 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 A *VIN = VIL or VIH -24 mA IOH -24 mA IOUT = 50 A *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V
A A mA mA mA A
5.5 55 5.5 5.5 5.5 5.5 55
- 0.6 - - -
ICCT IOLD IOHD ICC
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
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MC74AC299, MC74ACT299
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT Symbol Parameter VCC* (V) Min fmax tPLH tPHL tPLH tPHL tPHL tPHL tPZH tPZL tPHZ tPLZ Maximum In ut Input Frequency Propagation Delay Pro agation CP to Q0 or Q7 Pro agation Propagation Delay CP to Q0 or Q7 Pro agation Propagation Delay CP to I/On Pro agation Propagation Delay CP to I/On Pro agation Propagation Delay MR to Q0 or Q7 Propagation Delay Pro agation MR to I/On Out ut Output Enable Time OE to I/On Output Enable Time Out ut OE to I/On Out ut Output Disable Time OE to I/On Out ut Output Disable Time OE to I/On 5.0 50 50 5.0 5.0 50 5.0 50 5.0 50 5.0 50 50 5.0 5.0 50 50 5.0 5.0 50 5.0 50 120 40 4.0 4.0 40 4.5 45 5.0 50 4.0 40 40 4.0 2.5 25 20 2.0 2.0 20 2.5 25 TA = +25C CL = 50 pF Typ - - - - - - - - - - - Max - 12 5 12.5 13.5 13 5 12.5 12 5 15 15 14 5 14.5 12 12 12.5 12 5 11.5 11 5 74ACT TA = -40C to +85C CL = 50 pF Min 110 30 3.0 3.5 35 4.5 45 4.5 45 4.0 40 35 3.5 1.5 15 15 1.5 2.0 20 2.0 20 Max - 14 15 13.5 13 5 16.5 16 5 18 17 5 17.5 13 13 5 13.5 13.5 13 5 12.5 12 5 MHz ns ns ns ns ns ns ns ns ns ns 3-3 3-6 3-6 3-6 3-6 3-6 3-6 3-7 3-8 3-7 3-8 Unit Fig. No.
*Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC299, MC74ACT299
AC OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* (V) Typ ts th ts th ts th tw tw trec Setu Setup Time, HIGH or LOW S0 or S1 to CP Hold Time, HIGH or LOW S0 or S1 to CP Setu Setup Time, HIGH or LOW I/On to CP Hold Time, HIGH or LOW I/On to CP Setu Setup Time, HIGH or LOW DS0 or DS7 to CP Hold Time, HIGH or LOW DS0 or DS7 to CP CP Pulse Width HIGH or LOW MR Pulse Width LOW Width, Recovery Time MR to CP 5.0 50 5.0 50 5.0 50 50 5.0 5.0 50 5.0 50 5.0 50 5.0 50 5.0 50 - - - - - - - - - TA = +25C CL = 50 pF 74ACT TA = -40C to +85C CL = 50 pF Unit Fig. No.
Guaranteed Minimum 5.0 50 1.0 10 4.0 40 10 1.0 4.5 45 1.0 10 4.0 40 3.5 35 1.5 15 5.5 55 1.0 10 4.5 45 10 1.0 5.0 50 1.0 10 4.5 45 3.5 35 1.5 15 ns ns ns ns ns ns ns ns ns 3-9 3-9 3-9 3-9 3-6 3-6 3-9 3-9 3-9
*Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 170 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
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MC74AC299, MC74ACT299
MARKING DIAGRAMS
PDIP-20 MC74AC299N AWLYYWW
SO-20 AC299 AWLYYWW
MC74ACT299N AWLYYWW
ACT299 AWLYYWW
A WL, L YY, Y WW, W
= Assembly Location = Wafer Lot = Year = Work Week
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MC74AC299, MC74ACT299
PACKAGE DIMENSIONS
PDIP-20 N SUFFIX 20 PIN PLASTIC DIP PACKAGE CASE 738-03 ISSUE E
-A-
20 1 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01
B
10
C
L
-T-
SEATING PLANE
K M E G F D
20 PL
N J 0.25 (0.010)
M 20 PL
0.25 (0.010) TA
M
M
TB
M
SO-20 DW SUFFIX 20 PIN PLASTIC SOIC PACKAGE CASE 751D-05 ISSUE F
D q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
A
11 X 45 _
H
M
B
M
20
10X
0.25
E
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
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L
MC74AC299, MC74ACT299
Notes
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MC74AC299, MC74ACT299
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MC74AC299/D

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